Sense amplifiers used with memory devices, such as floating gate memory devices, are well known in the art. See, for example, U.S. Pat. No. 4,223,394. However, in that reference, two transistors with differing thresholds are used to set the sensing level voltage. See, for example, column 4, lines 16-17 thereof. The drawbacks of this technique is that the threshold difference may vary with process and thus there is no assurance that the difference in the thresholds will be maintained. In addition, if the threshold difference is too great, speed in sensing suffers.
Sense amplifiers using an inverter to compare the current of a reference cell to the current from a selected cell is also well known. See for example U.S. Pat. No. 5,386,158. However, that reference discloses only the sensing of a selected cell having a single level of storage, i.e. one bit of storage.
In an article entitled "Novel Small-area Readout Circuit for Multi-Level Memories" by D. Montanari et. al. published in the 15th Annual IEEE Non-Volatile Semiconductor Memory Workshop, Monterey, Calif. (Feb. 9-12, 1977), the authors disclosed a multi-level sense amplifier using a plurality of comparators, and concluded that the use of a plurality of comparators in multi-level sense amplifier was not desirable due to the considerable area cost of the comparators.